Cypress Semiconductor /psoc63 /SRSS /CLK_DSI_SELECT[15]

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Interpret as CLK_DSI_SELECT[15]

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DSI_OUT0)DSI_MUX

DSI_MUX=DSI_OUT0

Description

Clock DSI Select Register

Fields

DSI_MUX

Selects a DSI source or low frequency clock for use in a clock path. The output of this mux can be selected for clock PATH using CLK_SELECT_PATH register. Using the output of this mux as HFCLK source will result in undefined behavior. It can be used to clocks to DSI or to the reference inputs of FLL/PLL, subject to the frequency limits of those circuits. This mux is not glitch free, so do not change the selection while it is an actively selected clock.

0 (DSI_OUT0): DSI0 - dsi_out[0]

1 (DSI_OUT1): DSI1 - dsi_out[1]

2 (DSI_OUT2): DSI2 - dsi_out[2]

3 (DSI_OUT3): DSI3 - dsi_out[3]

4 (DSI_OUT4): DSI4 - dsi_out[4]

5 (DSI_OUT5): DSI5 - dsi_out[5]

6 (DSI_OUT6): DSI6 - dsi_out[6]

7 (DSI_OUT7): DSI7 - dsi_out[7]

8 (DSI_OUT8): DSI8 - dsi_out[8]

9 (DSI_OUT9): DSI9 - dsi_out[9]

10 (DSI_OUT10): DSI10 - dsi_out[10]

11 (DSI_OUT11): DSI11 - dsi_out[11]

12 (DSI_OUT12): DSI12 - dsi_out[12]

13 (DSI_OUT13): DSI13 - dsi_out[13]

14 (DSI_OUT14): DSI14 - dsi_out[14]

15 (DSI_OUT15): DSI15 - dsi_out[15]

16 (ILO): ILO - Internal Low-speed Oscillator

17 (WCO): WCO - Watch-Crystal Oscillator

18 (ALTLF): ALTLF - Alternate Low-Frequency Clock

19 (PILO): PILO - Precision Internal Low-speed Oscillator

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